Karnaugh Map (part II)
Suppose you thought a great circuit to solve some practical problem. You know how the circuit should behave for...
Digital Electronics
Flip Flop
The Logic gates can be combined to create a two-state element. Where both the states are stable, and the element can remain in...
Flip Flop (Clocked SR)
Lets modify our SR Flip-flop and provide a clock enable. This means that the output will change only when clock is '1', otherwise all...
Flip Flop (J-K Flip-Flop)
Lets modify our SR Flip-flop and provide a clock enable. This means that the output will change only when clock is '1', otherwise all...
Flip Flop (Master Slave J-K )
Two J-K flip-flops can be used to make a master slave J-K flip-flop (as shown above). Observe carefully how the clock is fed to...